Combinational Circuits

A comparative study of encodings to design combinational logic circuits using particle swarm optimization

Computer Science / Computational Modeling / Evolutionary Computation / Genetic Algorithms / Integer Programming / Convergence / Comparative Study / Stability / Particle Swarm Optimization / Proceedings / Hardware / Acceleration / Robustness / Circuit Design / Encoding / Design optimization / Evolvable Hardware / Logic Design / Performance Indicator / Particle Swarm Optimizer / Logic circuits / Combinational Circuits / Convergence / Comparative Study / Stability / Particle Swarm Optimization / Proceedings / Hardware / Acceleration / Robustness / Circuit Design / Encoding / Design optimization / Evolvable Hardware / Logic Design / Performance Indicator / Particle Swarm Optimizer / Logic circuits / Combinational Circuits

Soft delay error effects in CMOS combinational circuits

Error Analysis / Semiconductor device modeling / Energetic particles / Combinational Circuits

Memristor-based IMPLY logic design procedure

Logic Design / Logic Gates / Combinational Circuits

Memristor-based IMPLY logic design procedure

Logic Design / Logic Gates / Combinational Circuits

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